AT87251G2D-3CSUM【PDF 24/77 页】IC 8051 MCU 32K OTP 24MHZ 40DIP

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AT/TSC8x251G2D

4135F–8051–11/06

Table 25.

Summary of Move Instructions (1/3)

Notes: 1. A shaded cell denotes an instruction in the C51 Architecture.

2. Extended memory addressed is in the region specified by DPXL (reset value = 01h).

3. If this instruction addresses external memory location, add N+1 to the number of

states (N: number of wait states).

4. If this instruction addresses external memory location, add N+2 to the number of

states (N: number of wait states).

Move to High wordMOVH <dest>, <src>dest opnd31:16 ← src opnd

Move with Sign extensionMOVS <dest>, <src>dest opnd

← src opnd with sign extend

Move with Zero extensionMOVZ <dest>, <src>dest opnd

← src opnd with zero extend

Move CodeMOVC A, <src>(A)

← src opnd

Move eXtendedMOVX <dest>, <src>dest opnd

← src opnd

Mnemonic

<dest>,

<src>

(2)

Comments

Binary Mode

Source Mode

Bytes

States

Bytes

States

MOVH

DRk, #data16

16-bit immediate data into upper

word of dword register

MOVS

WRj, Rm

Byte register to word register with

sign extension

MOVZ

WRj, Rm

Byte register to word register with

zeros extension

MOVC

A, at A +DPTR

Code byte relative to DPTR to

ACC

16(3)

A, at A +PC

Code byte relative to PC to ACC

6(3)

16(3)

MOVX

A, at Ri

Extended memory (8-bit address)

to ACC(2)

A, at DPTR

Extended memory (16-bit

address) to ACC(2)

13(4)

at Ri, A

ACC to extended memory (8-bit

address)(2)

at DPTR, A

ACC to extended memory (16-bit

address)(2)

14(3)

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